Monday, January 07, 2008
Sunday, December 30, 2007
Do engineers really do R&D?
Embedded Guru - Jack Ganssle has a column on embedded.com called Breakpoints. A highly recommended read if you are or want to be a embedded systems developer. Recently Jack wrote a nice article on what actually R&D is meant for and what actually it is. I would like to post that small article over here or else you can have a look at it @ Breakpoints
"Research and Development. R&D. It's the lifeblood of tech companies, and it's what we engineers do all day, every day.
Nonsense.
There's no such thing as R&D. There's R, and there's D, and the two are completely separate activities.
Research is all about discovering new things. It's the science that ultimately enables the products we build, the metaphorical man-behind-the-curtain pulling the levers to control the machines we create.
Research might also involve discovering new algorithms, like new ways to smooth signals or compress data. "New" might mean new to us but not to the world. So we research an idea or a need, and then switch to development mode. The result of research is an approach that one can then implement.
Development is taking known ideas and using them to build products. That's the bulk of an engineer's work. We transform an algorithm to something physical, like converting a CRC algorithm to C code, to VHDL inside an FPGA, or to logic components.
One of my top ten reasons for failed projects is "bad science," or the inability to separate R from D. When a company starts building a product before really understanding what is being measured the schedule is doomed. Start coding an algorithm without it being sharply defined and, at best, you'll wander aimlessly till, with luck, settling on an approach that works.
Research simply can't be scheduled. If you don't believe that, please develop a (realistic) schedule for discovering the cure for cancer.
You might be able to guesstimate simple research schedules, like doing a search for a known algorithm, but even that is, in my experience, very difficult to estimate. The first "Eureka" is often followed by disappointment when a little experimenting reveals some fatal flaw, requiring more research to find a better approach.
Yet I constantly see teams conflating R and D, leading inevitably to late or failed projects.
Sure, there are some projects that necessarily pursue R and D in parallel. But those care rarely be scheduled with any accuracy.
What do you think? Have you ever had a project disaster because you were doing R and the same time as D?"
-- Jack Ganssle
Posted by Deepak Salunke at 2:40 PM 1 comments
Labels: Digital Design, General, Management, Programming
Future of Nanoelectronics: 20-Hour Battery Life for your Laptop

When people think of nanotechnology in electronics they like to imagine molecular electronics, but it may be the mundane that pushes nanotechnology further into the electronics industry.
Imagine a laptop battery that could last 20 hours rather than 2. That is what you call a unique selling point, and surely something that has long been sought by computer manufacturers.
Some of you might remember NEC letting it be known (back in 2001, then in 2003, and again in 2004--the picture above gives you an indication of how long ago this was) that they had a fuel-cell battery enabled by nanotechnology that would last for 40 hours, and it would hit the market by 2004. It was never released to the market, and is hardly mentioned now except for those who question, “Whatever happened to…?”
The latest entry into the fray of improving upon Li-Ion battery technology comes from Yi Cui, Assistant Professor of Materials Science and Engineering at Stanford.
The beauty of this solution is…well, it’s not a fuel cell with all its incumbent limitations. Instead it simply replaces the lithium in the anode with silicon nanowires…that’s very simply.
Supposedly, current manufacturing techniques can easily accommodate this solution. That said, it is still just research, although Cui has announced the launching of a start-up to commercialize the technology.
Expect a lot more in the field of battery technology. Pretty safe bet that this is just the tip of the iceberg.
Posted by Deepak Salunke at 12:09 PM 0 comments
Labels: Digital Design, VLSI
Friday, December 28, 2007
VLSI Design Conference 2008 Hyderabad
VLSI Design Conference 2008 (the 21st International Conference on VLSI Design and also the seventh International Conference on Embedded Systems), sponsored by VLSI Society of India, IEEE, IEEE-SSCS, will be held form 4 January to 8 January 2008 at HICC, Hyderabad, India.
The joint conference presents a platform for researchers and designers to present and discuss various aspects of VLSI design, electronic design automation (EDA), enabling technologies and embedded systems. It covers the entire spectrum of activities in the two vital areas of VLSI and embedded systems, which underpin the semiconductor industry.
The five-day programme will consist of regular paper sessions, special sessions, embedded tutorials, panel discussions, design contest, industrial exhibits and two days of tutorials. The 2008 conference has a particular emphasis on the challenges and opportunities in nanoelectronics.
For Details - VlsiConference
Posted by Deepak Salunke at 10:06 PM 0 comments
Labels: Digital Design, VLSI
Wednesday, September 12, 2007
45 days and counting… to the magic of 45nm Hafnium

In 45 days, a new building called “Fab 32” tucked into a sleepy corner of Arizona will come to life. Inside this building a new type of device will be made in incredible numbers. These devices will be able to shop for groceries, analyze proteins, play computer games, model financial markets, allow you to chat to your aunt in Australia, design automobiles and search for aliens. And these devices will do so faster than ever before, cooler than ever before and better than ever before.
I am of course talking about Intel‘s new high-k and metal gate based 45nm chips. The champion of technology and the true revolutionary; Gordon Moore said earlier this year – “…high-k and metal materials marks the biggest change in transistor technology since the introduction of polysilicon gate MOS transistors in the late 1960s.” Like the original silicon MOS transistors, the devices created at this new manufacturing fab will be forged with new ideas and new materials including — Hafnium. The new fab will be the world’s first 45nm (nanometer = teeny-tiny) facility to make Intel’s latest generation microprocessors based on the new high-k metal gate transistors, and do so in colossal numbers.
The first of these new chips were manufactured back in January at the development fab (called D1D - see a video of D1D here) up in Hillsboro, Oregon. In the months following, the chips were tested and perfected by our elite engineers. Those clever boffins also began seeding the technology to the team that will work in Fab 32, the world first high-volume 45nm manufacturing fab in Chandler, Ariz. Two additional 45nm fabs will come online next year in Israel and in New Mexico. These fabs will create the next generation of Core 2 processors.
People have come to expect new chip technology to arrive to the ~2 year beat of Moore’s Law. What the average Joe doesn’t know is that halving the size of things every two years is kinda difficult yet wonderful. As the old analogy goes: If the automobile industry had a ‘Moore’s Law’ effect, your car would go a bazillion miles on one tank of fuel and cost less than tasty morsel from a fast food joints’ dollar menu.
But cramming more and more transistors – now the size of a virus – together is insanely difficult. To do it once is amazing, but to shove more than 400 million of them together in a sensible pattern and in a way where they all just work is little short of miraculous. If not broken, surely the laws of physics have to be coaxed into bending a little? (Wishful thinking.)
And we the consumer enjoy the benefits. Smaller transistors lead to smaller and faster chips, made with new materials. These new materials – a hafnium-based high-k material for the transistor’s insulating layer and metal materials for the transistor gate make the 45nm chips even quicker and even cooler. More so, these 45nm chips will lead to new growth opportunities for Intel and high tech industry. Imagine an ultra mobile device that is half – or even a quarter the size of your laptop today, Internet-connected consumer electronic devices that talk to each other and your TV, or even a powerful, cost-effective processor for emerging economies.
Construction on Fab 32 first began more than 2 years ago and anticipation of the official opening grows each day. Intel is no stranger to building and ramping fabs in preparation for a shift to a new process technology, but this time it means a little more. So in 45 days, you will hear more about Intel’s $3 billion investment in Fab 32.
Posted by Deepak Salunke at 6:14 PM 0 comments
Labels: Digital Design
Tuesday, June 26, 2007
Intel Proposes 80 Core... For Your Laptop
Posted by Deepak Salunke at 10:00 AM 0 comments
Labels: Digital Design
Monday, June 25, 2007
Claytronics - Physical Dynamic Rendering
Posted by Deepak Salunke at 4:57 PM 0 comments
Labels: Digital Design
Tuesday, June 19, 2007
Geek Rhythms: Enjoy The Ride
3D animation video based on the song by same name. Walk the insides of a computer chip, circuit board and tap your feet to the rhythms of technology....
Posted by Deepak Salunke at 5:32 PM 0 comments
Labels: Digital Design
Wednesday, February 14, 2007
MPLAB with MATLAB now...
Microchip Technology Inc., a leading provider of microcontroller and analog semiconductors, today announced that, through its close collaboration with The MathWorks, Inc., a leading developer of technical computing and Model-Based Design software, Microchip's popular MPLAB® Integrated Development Environment (IDE) now features a free plug-in for The MathWorks MATLAB®, Simulink® and Real-Time Workshop® Embedded Coder modeling and code-generation programs.
Update: a Simulink blockset for dsPIC is presented and can be download at : http://www.kerhuel.eu/RTWdsPIC
Posted by Deepak Salunke at 4:47 PM 3 comments
Labels: Digital Design